This tutorial explains about Serial-in, serial-out shift registers. These registers delay data by one clock time in each stage. They will store a bit of data for each of the registers. A serial-in, serial-out shift register may be 1 to 64 bits in length, longer registers or packages are cascaded.
Discussed Below is a single stage shift register which is receiving data and which is not synchronized to the register clock. The ‘data in’ at the D pin of the type D FF (Flip-Flop) does not change levels when the clock changes from low to high. You may want to synchronize the data to a system wide clock in a circuit board to improve reliability of the digital logic circuit.
