Diagtam 12. 10 show the symbol used for the data-type (or D-type) flip-flop and the action of ehis flip flop is plotted in the graphs. For the purpose of clocked mode operation like this, the Set input (S) and Reset input (R) are held low. Buy there are few kinds of D-type flip-flop that do not have the R input.
12
The graphs that are shown below are drawn on the basis of a simulator, modelling a 74LS74 D-type flip-flop. This clock is running at the frequency of 10 MHz and the time scale measures in nanoseconds. When The graph lowest it shows the output Q. The simulator is stepped manually so that it enables you to make the data input high or low when we desire.
