Showing posts with label ctive-high or active-low. Show all posts
Showing posts with label ctive-high or active-low. Show all posts

Asynchronous Flip-flop Inputs

The normal inputs of data to a flip flop (0, Sand R, or J and K) are specified to as synchronous inputs because they have ability to affect on the outputs (Q and not-Q) only in step, or in sync, with the clock signal transitions. These additional inputs that are brought to your knowledge are called asynchronous because they can set or reset the flip-flop regardless of the status of the clock signal. Normally, they're called preset and clear.
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